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Member of: DesignPrinciples & Equations

This page is for Rules of Thumb and other handy shortcuts.

Above threshold operation usually occurs for bias currents > 1μA in a 0.5μ process.

The transistor as an amplifier

nMOS
  • Gate voltage increases: Ids increases by a large amount.
  • Drain voltage increases: Ids increases by a small amount.
  • Source voltage increases: Ids decreases by a large amount.
pMOS
  • Gate voltage increases: Isd increases by a large amount.
  • Drain voltage increases: Isd increases by a small amount.
  • Source voltage increases: Isd decreases by a large amount.

This can be restated as:

  • Gate is a low impedance (high conductance) node.
  • Drain is a high impedance node.
  • Source is a low impedance (high conductance) node.

or in equation form: \Delta I_{ds} = g_m \Delta V_g + g_d \Delta V_d - (g_m + g_d) \Delta V_s (for the small signal model)

Relative Values

Knowing these can help simplify lots of equations:

  • rds > 1/gs> 1/gm Approximately one order of magnitude between each step.
  • g_m \approx 10^{-6} \frac1{\Omega}, g_d = \frac1{r_{ds}} \approx 10^{-8} \frac1{\Omega}

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Last edited by DrLock. Originally by DrLock.